The Laboratory of Nanoscale Electronics and Structures (LANES) at the Ecole Polytechnique Fédérale de Lausanne (EPFL) in Switzerland has unveiled a groundbreaking achievement: the world’s first large-scale in-memory processor. This innovative processor is designed to revolutionize energy consumption in data processing, prioritizing energy efficiency.
The contemporary landscape of information technology is characterized by the substantial heat generated by its systems. Addressing this issue not only enhances energy utilization but also aligns with global efforts to reduce carbon emissions and transition towards greener technologies in the coming decades. The key to mitigating excessive heat lies in challenging the traditional von Neumann architecture.
The von Neumann architecture, conceived at Princeton in 1945, separates the information processing and storage components. Much of the energy expenditure in contemporary computing arises from shuttling vast amounts of data between the memory and the processor. The EPFL researchers recognized that overcoming this challenge required a departure from conventional design.
Enter the in-memory processor – a groundbreaking concept where data storage and processing occur within the same unit. In lieu of traditional silicon, the researchers opted for molybdenum disulfide (MoS2), an alternative semiconductor with unique properties. MoS2 can form a stable monolayer only three atoms thick, interacting minimally with its environment. The researchers even fabricated a single transistor monolayer using Scotch tape. The thin, two-dimensional structure allows for the creation of extremely compact devices.
The LANES research team achieved a significant milestone by designing a large-scale transistor comprising 1024 elements. This compact structure fits within a one-by-one centimeter chip, with each component serving as both a transistor and a floating gate that stores a charge, controlling the conductivity of each transistor.
Notably, the EPFL researchers fundamentally altered how processors execute calculations, exemplified by their ability to perform vector-matrix multiplication in a single step. The team’s success can be attributed to their meticulous processes developed over 13 years, allowing the production of entire wafers uniformly covered with MoS2. Professor Andras Kis, from EPFL’s Electrical Engineering department, emphasized the potential for mass production using industry-standard tools.
Beyond its technical implications, the researchers view this novel architecture as a catalyst for revitalizing electronics fabrication in Europe. Instead of competing in silicon wafer fabrication, they envision non-von Neumann processing architectures playing a pivotal role in future applications like artificial intelligence. The research findings have been published in the prestigious journal Nature Electronics, marking a significant leap forward in the field of computing technology.
